# This is the CMakeCache file.
# For build in directory: /var/www/debian/sel4/sel4-10.1.1/obj-x86_64-linux-gnu
# It was generated by CMake: /usr/bin/cmake
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# The syntax for the file is as follows:
# KEY:TYPE=VALUE
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//Path to a file.
BF_GEN_PATH:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/bitfield_gen.py

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CIRCULAR_INCLUDES:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/circular_includes.py

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CMAKE_ASM_FLAGS:STRING=

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CMAKE_ASM_FLAGS_DEBUG:STRING=-g

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CMAKE_BUILD_TYPE:STRING=None

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CMAKE_COLOR_MAKEFILE:BOOL=ON

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CMAKE_C_COMPILER:FILEPATH=/usr/bin/cc

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CMAKE_VERBOSE_MAKEFILE:BOOL=ON

//Path to a file.
CPP_GEN_PATH:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/cpp_gen.sh

CSPEC_DIR:PATH=.

//Path to a file.
INVOCATION_ID_GEN_PATH:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/invocation_header_gen.py

//Path to a file.
KERNEL_FLAGS_PATH:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/flags.cmake

//Path to a file.
KERNEL_HELPERS_PATH:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/helpers.cmake

//Enable hardware VFP and SIMD context switch         This enables
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// C library (e.g. mfloat-abi=soft).
KernelAArch32FPUEnableContextSwitch:BOOL=ON

//Select the platform for the architecture
KernelARMPlatform:STRING=sabre

//Architecture to use when building the kernel
KernelArch:STRING=arm

//Enable Cortex-A9 prefetcher     Cortex-A9 has an L1 and L2 prefetcher.
// By default     they are disabled. This config options allows
//     them to be turned on. Enabling the prefetchers     requires
// that the kernel be in secure mode. ARM     documents indicate
// that as of r4p1 version of     Cortex-A9 the bits used to enable
// the prefetchers     no longer exist, it is not clear if this
// is just     a document error or not.
KernelArmEnableA9Prefetcher:BOOL=OFF

//PL0 access to PMU.     Grant user access to Performance Monitoring
// Unit.     WARNING: While useful for evaluating performance,
//     this option opens timing and covert channels.
KernelArmExportPMUUser:BOOL=OFF

//Architecture mode for building the kernel
KernelArmSel4Arch:STRING=aarch32

//Enable benchamrks including logging and tracing info.     Setting
// this value > 1 enables a 1MB log buffer and functions for extracting
// data from it     at user level. NOTE this is only tested on
// the sabre and will not work on platforms with < 512mb memory.
//     This is not fully implemented for x86.     none -> No Benchmarking
// features enabled.     generic -> Enable global benchmarks config
// variable with no specific features.     track_kernel_entries
// -> Log kernel entries information including timing, number of
// invocations and arguments for     system calls, interrupts,
// user faults and VM faults.     tracepoints -> Enable manually
// inserted tracepoints that the kernel will track time consumed
// between.     track_utilisation -> Enable the kernel to track
// each thread's utilisation time.
KernelBenchmarks:STRING=none

//Do not enable branch prediction (also called program flow control)
// on startup.     This makes execution time more deterministic
// at the expense of dramatically decreasing     performance. Primary
// use is for debugging.
KernelDebugDisableBranchPrediction:BOOL=OFF

//Do not enable the L2 cache on startup for debugging purposes.
KernelDebugDisableL2Cache:BOOL=OFF

//A C file providing the symbols ksDomSchedule and ksDomeScheudleLength
//         to be linked with the kernel as a scheduling configuration.
KernelDomainSchedule:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/src/config/default_domain.c

//This option is a heuristic to attempt to detect when the FPU
// is no longer in use,    allowing the kernel to save the FPU
// state out so that the FPU does not have to be    enabled/disabled
// every thread swith. Every time we restore a thread and there
// is    active FPU state, we increment this setting and if it
// exceeds this threshold we    switch to the NULL state.
KernelFPUMaxRestoresSinceSwitch:STRING=64

//Enable -fwhole-program when linking kernel. This should work
// modulo gcc bugs, which     are not uncommon with -fwhole-program.
// Consider this feature experimental!
KernelFWholeProgram:BOOL=OFF

//Enable IPC fastpath
KernelFastpath:BOOL=ON

//Controls how the location of the IPC buffer is provided to the
// user for aarch32     globals_frame-> Put the address of the
// IPC buffer in a dedicated frame that is         read only at
// user level. This works on all ARM platforms     threadID_register->
// Put the address of the IPC buffer in the user readable/writeable
//         ThreadID register. When enabled this has the result
// of the kernel overwriting         any value the user writes
// to this register.
KernelIPCBufferLocation:STRING=threadID_register

//Max number of bootinfo untyped caps
KernelMaxNumBootinfoUntypedCaps:STRING=230

//Max number of CPU cores to boot
KernelMaxNumNodes:STRING=1

//Maximum number of work units (delete/revoke iterations) until
// the kernel checks for    pending interrupts (and preempts the
// currently running syscall if interrupts are pending).
KernelMaxNumWorkUnitsPerPreemption:STRING=100

//The number of scheduler domains in the system
KernelNumDomains:STRING=1

//The number of priority levels per domain. Valid range 1-256
KernelNumPriorities:STRING=256

//Select the kernel optimisation level
KernelOptimisation:STRING=-O2

//Frequency of Clock used for Scheduler
KernelPlatformSpikeClockFrequency:STRING=10000000

//Maximum size in bits of chunks of memory to zero before checking
// a preemption point.
KernelResetChunkBits:STRING=8

//Maximum number of objects that can be created in a single Retype()
// invocation.
KernelRetypeFanOutLimit:STRING=256

//Root CNode Size (2^n slots)     The acceptable range is 4-27,
// based on the kernel-supplied caps.    The root CNode needs at
// least enough space to contain up to    BI_CAP_DYN_START. Note
// that in practice your root CNode will need    to be several
// bits larger than 4 to fit untyped caps and    cannot be 27 bits
// as it won't fit in memory.
KernelRootCNodeSizeBits:STRING=12

//This describes the log2 size of the kernel stack. Great care
// should be taken as    there is no guard below the stack so setting
// this too small will cause random    memory corruption
KernelStackBits:STRING=12

//Number of timer ticks until a thread is preempted.
KernelTimeSlice:STRING=5

//Timer tick period in milliseconds
KernelTimerTickMS:STRING=2

//When enabled this configuration option prevents the usage of
// any other options that    would compromise the verification
// story of the kernel. Enabling this option does NOT    imply
// you are using a verified kernel.
KernelVerificationBuild:BOOL=ON

SKIP_MODIFIES:BOOL=ON

SORRY_BITFIELD_PROOFS:BOOL=OFF

//Path to a file.
SYSCALL_ID_GEN_PATH:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/syscall_header_gen.py

//Path to a file.
UMM_TYPES:FILEPATH=UMM_TYPES-NOTFOUND

//Path to a file.
XMLLINT_PATH:FILEPATH=/var/www/debian/sel4/sel4-10.1.1/tools/xmllint.sh

//Value Computed by CMake
seL4_BINARY_DIR:STATIC=/var/www/debian/sel4/sel4-10.1.1/obj-x86_64-linux-gnu

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INVOCATION_ID_GEN_PATH-ADVANCED:INTERNAL=1
//ADVANCED property for variable: KERNEL_FLAGS_PATH
KERNEL_FLAGS_PATH-ADVANCED:INTERNAL=1
//ADVANCED property for variable: KERNEL_HELPERS_PATH
KERNEL_HELPERS_PATH-ADVANCED:INTERNAL=1
KerenlOptimisationO1:INTERNAL=OFF
KerenlOptimisationO2:INTERNAL=ON
KerenlOptimisationO3:INTERNAL=OFF
KerenlOptimisationOS:INTERNAL=OFF
Kernel32:INTERNAL=ON
Kernel64:INTERNAL=OFF
//STRINGS property for variable: KernelARMPlatform
KernelARMPlatform-STRINGS:INTERNAL=sabre;kzm;omap3;am335x;exynos4;exynos5410;exynos5422;exynos5250;apq8064;wandq;imx7sabre;zynq7000;zynqmp;ultra96;allwinnera20;tk1;hikey;rpi3
KernelARMPlatform_all_strings:INTERNAL=sabre;kzm;omap3;am335x;exynos4;exynos5410;exynos5422;exynos5250;apq8064;wandq;imx7sabre;zynq7000;zynqmp;ultra96;allwinnera20;tk1;hikey;rpi3;tx1;tx2
//Enable SMMU interrupts.     SMMU interrupts currently only serve
// a debug purpose as     they are not forwarded to user level.
// Enabling this will     cause some fault types to print out a
// message in the kernel.     WARNING: Printing fault information
// is slow and rapid faults     can result in all time spent in
// the kernel printing fault     messages
KernelARMSMMUInterruptEnable:INTERNAL=OFF
KernelARMSMMUInterruptEnable_DISABLED:INTERNAL=TRUE
//STRINGS property for variable: KernelArch
KernelArch-STRINGS:INTERNAL=arm;riscv;x86
KernelArchARM:INTERNAL=ON
KernelArchArmV6:INTERNAL=OFF
KernelArchArmV7a:INTERNAL=ON
KernelArchArmV7ve:INTERNAL=OFF
KernelArchArmV8a:INTERNAL=OFF
KernelArchRiscV:INTERNAL=OFF
KernelArchX86:INTERNAL=OFF
KernelArch_all_strings:INTERNAL=arm;riscv;x86
KernelArm1136JF_S:INTERNAL=OFF
KernelArmArmV:INTERNAL=armv7-a
KernelArmCPU:INTERNAL=cortex-a9
KernelArmCortexA15:INTERNAL=OFF
KernelArmCortexA53:INTERNAL=OFF
KernelArmCortexA57:INTERNAL=OFF
KernelArmCortexA7:INTERNAL=OFF
KernelArmCortexA8:INTERNAL=OFF
KernelArmCortexA9:INTERNAL=ON
KernelArmEnablePMUOverflowInterrupt:INTERNAL=OFF
//Enable workaround for 430973 Cortex-A8 (r1p0..r1p2) erratum 
//    Enables a workaround for the 430973 Cortex-A8 (r1p0..r1p2)
// erratum. Error occurs     if code containing ARM/Thumb interworking
// branch is replaced by different code     at the same virtual
// address.
KernelArmErrata430973:INTERNAL=OFF
KernelArmErrata430973_DISABLED:INTERNAL=TRUE
//Enable workaround for 773022 Cortex-A15 (r0p0..r0p4) erratum
//     Enables a workaround for the 773022 Cortex-A15 (r0p0..r0p4)
// erratum. Error occurs     on rare sequences of instructions
// and results in the loop buffer delivering     incorrect instructions.
// The work around is to disable the loop buffer
KernelArmErrata773022:INTERNAL=OFF
KernelArmErrata773022_DISABLED:INTERNAL=TRUE
//PL0 access to generic timer CNTPCT and CNTFRQ.     Grant user
// access to physical counter and counter     frequency registers
// of the generic timer.     WARNING: selecting this option opens
// a timing     channel
KernelArmExportPCNTUser:INTERNAL=OFF
KernelArmExportPCNTUser_DISABLED:INTERNAL=TRUE
//PL0 access to generic timer CNTVCT and CNTFRQ.     Grant user
// access to virtual counter and counter     frequency registers
// of the generic timer.     WARNING: selecting this option opens
// a timing     channel
KernelArmExportVCNTUser:INTERNAL=OFF
KernelArmExportVCNTUser_DISABLED:INTERNAL=TRUE
//STRINGS property for variable: KernelArmHikeyOutstandingPrefetchers
KernelArmHikeyOutstandingPrefetchers-STRINGS:INTERNAL=1;2;3;4;5;6;7
KernelArmHikeyOutstandingPrefetchers:INTERNAL=0
KernelArmHikeyOutstandingPrefetchers_UNAVAILABLE:INTERNAL=ON
//STRINGS property for variable: KernelArmHikeyPrefetcherNPFSTRM
KernelArmHikeyPrefetcherNPFSTRM-STRINGS:INTERNAL=1;2;3;4
KernelArmHikeyPrefetcherNPFSTRM:INTERNAL=0
KernelArmHikeyPrefetcherNPFSTRM_UNAVAILABLE:INTERNAL=ON
//Enable prefetch streams initated by STB access     Enable prefetch
// streams initated by STB access. Enabled is the reset value
KernelArmHikeyPrefetcherSTBPFDIS:INTERNAL=OFF
KernelArmHikeyPrefetcherSTBPFDIS_DISABLED:INTERNAL=TRUE
//Prefetcher to initated on a ReadUnique or ReadShared     Sets
// prefetcher to initated on a ReadUnique (n) or ReadShared (y)
//     ReadUnique is the reset value
KernelArmHikeyPrefetcherSTBPFRS:INTERNAL=OFF
KernelArmHikeyPrefetcherSTBPFRS_DISABLED:INTERNAL=TRUE
//STRINGS property for variable: KernelArmHikeyPrefetcherStride
KernelArmHikeyPrefetcherStride-STRINGS:INTERNAL=2;3
KernelArmHikeyPrefetcherStride:INTERNAL=0
KernelArmHikeyPrefetcherStride_UNAVAILABLE:INTERNAL=ON
//Trap, but don't save/restore VCPUs' CP14 accesses     This allows
// us to turn off the save and restore of VCPU threads' CP14  
//   context for performance (or other) reasons, we can just turn
// them off     and trap them instead, and have the VCPUs' accesses
// to CP14     intercepted and delivered to the VM Monitor as fault
// messages
KernelArmHypEnableVCPUCP14SaveAndRestore:INTERNAL=OFF
KernelArmHypEnableVCPUCP14SaveAndRestore_DISABLED:INTERNAL=TRUE
//Build as Hypervisor. Utilise ARM virtualisation extensions to
// build the kernel as a hypervisor
KernelArmHypervisorSupport:INTERNAL=OFF
KernelArmHypervisorSupport_DISABLED:INTERNAL=TRUE
KernelArmMach:INTERNAL=imx
KernelArmMachFeatureModifiers:INTERNAL=
//Enable SystemMMU for the Tegra TK1 SoC
KernelArmSMMU:INTERNAL=OFF
KernelArmSMMU_DISABLED:INTERNAL=TRUE
//STRINGS property for variable: KernelArmSel4Arch
KernelArmSel4Arch-STRINGS:INTERNAL=aarch32;aarch64
KernelArmSel4Arch_all_strings:INTERNAL=aarch32;aarch64;arm_hyp
KernelBenchmarkUseKernelLogBuffer:INTERNAL=OFF
//STRINGS property for variable: KernelBenchmarks
KernelBenchmarks-STRINGS:INTERNAL=none
KernelBenchmarksNone:INTERNAL=ON
KernelBenchmarks_all_strings:INTERNAL=none;generic;track_kernel_entries;tracepoints;track_utilisation
KernelCacheLnSz_UNAVAILABLE:INTERNAL=ON
//In debug mode, seL4 prints diagnostic messages to its serial
// output describing,     e.g., the cause of system call errors.
// This setting determines whether ANSI escape     codes are applied
// to colour code these error messages. You may wish to disable
// this     setting if your serial output is redirected to a file
// or pipe.
KernelColourPrinting:INTERNAL=OFF
KernelColourPrinting_DISABLED:INTERNAL=TRUE
//Adds a system call that allows users to specify code to be run
// in kernel mode.     Useful for profiling.
KernelDangerousCodeInjection:INTERNAL=OFF
//Replaces the undefined instruction handler with a call to a function
// pointer in r8.     This is an alternative mechanism to the code
// injection syscall. On ARMv6 the syscall     interferes with
// the caches and branch predictor in such a way that it is unsuitable
//     for benchmarking. This option has no effect on non-ARMv6
// platforms.
KernelDangerousCodeInjectionOnUndefInstr:INTERNAL=OFF
KernelDangerousCodeInjectionOnUndefInstr_DISABLED:INTERNAL=TRUE
KernelDangerousCodeInjection_DISABLED:INTERNAL=TRUE
//Enable debug facilities (symbols and assertions) in the kernel
KernelDebugBuild:INTERNAL=OFF
KernelDebugBuild_DISABLED:INTERNAL=TRUE
//Do not enable the L1 data cache on startup for debugging purposes.
KernelDebugDisableL1DCache:INTERNAL=OFF
KernelDebugDisableL1DCache_DISABLED:INTERNAL=TRUE
//Do not enable the L1 instruction cache on startup for debugging
// purposes.
KernelDebugDisableL1ICache:INTERNAL=OFF
KernelDebugDisableL1ICache_DISABLED:INTERNAL=TRUE
//On ia32 platforms, this option disables the L2 hardware prefetcher,
// the L2 adjacent     cache line prefetcher, the DCU prefetcher
// and the DCU IP prefetcher. On the cortex     a53 this disables
// the L1 Data prefetcher.
KernelDebugDisablePrefetchers:INTERNAL=OFF
KernelDebugDisablePrefetchers_DISABLED:INTERNAL=TRUE
KernelEnableBenchmarks:INTERNAL=OFF
//Grant user access to the Performance Monitoring Counters.
//\n    This allows the user to read performance counters, although
//\n    not control what the counters are and whether or not they
//\n    are counting. Nevertheless whilst this is useful for
//\n    evalulating performance this option opens timing and covert
//\n    channels.
KernelExportPMCUser:INTERNAL=OFF
KernelExportPMCUser_DISABLED:INTERNAL=TRUE
KernelFPU_all_strings:INTERNAL=XSAVE;FXSAVE
KernelFSGSBase_all_strings:INTERNAL=inst;gdt;msr
KernelHaveFPU:INTERNAL=ON
//Add support for 1GB huge page. Not all recent processor models
// support this feature.
KernelHugePage:INTERNAL=OFF
KernelHugePage_DISABLED:INTERNAL=TRUE
//IOMMU support for VT-d enabled chipset
KernelIOMMU:INTERNAL=OFF
KernelIOMMU_DISABLED:INTERNAL=TRUE
KernelIPCBufferGlobalsFrame:INTERNAL=OFF
//STRINGS property for variable: KernelIPCBufferLocation
KernelIPCBufferLocation-STRINGS:INTERNAL=threadID_register;globals_frame
KernelIPCBufferLocation_all_strings:INTERNAL=threadID_register;globals_frame
KernelIPCBufferThreadID:INTERNAL=ON
KernelIRQController_all_strings:INTERNAL=IOAPIC;PIC
//seL4 does not properly check for and handle spurious interrupts.
// This can result     in unnecessary output from the kernel during
// debug builds. If you are CERTAIN these     messages are benign
// then use this config to turn them off.
KernelIRQReporting:INTERNAL=OFF
KernelIRQReporting_DISABLED:INTERNAL=TRUE
KernelIsMaster:INTERNAL=ON
KernelLAPICMode_all_strings:INTERNAL=XAPIC;X2APIC
KernelMaxNumIOAPIC:INTERNAL=0
KernelMaxNumIOAPIC_UNAVAILABLE:INTERNAL=ON
KernelMaxNumTracePoints:INTERNAL=0
KernelMaxNumTracePoints_UNAVAILABLE:INTERNAL=ON
KernelMaxRMRREntries:INTERNAL=1
KernelMaxRMRREntries_UNAVAILABLE:INTERNAL=ON
KernelMaxVPIDs:INTERNAL=0
KernelMaxVPIDs_UNAVAILABLE:INTERNAL=ON
//Inserts a header that indicates to the bootloader that the kernel
// supports a multiboot 1 boot header
KernelMultiboot1Header:INTERNAL=ON
KernelMultiboot1Header_DISABLED:INTERNAL=TRUE
//Inserts a header that indicates to the bootloader that the kernel
// supports a multiboot 2 boot header.     This is can be enabled
// together with a multiboot 1 header and the boot loader may use
// either one
KernelMultiboot2Header:INTERNAL=ON
KernelMultiboot2Header_DISABLED:INTERNAL=TRUE
KernelMultibootGFXDepth_UNAVAILABLE:INTERNAL=ON
KernelMultibootGFXHeight_UNAVAILABLE:INTERNAL=ON
KernelMultibootGFXMode_all_strings:INTERNAL=none;text;linear
KernelMultibootGFXWidth_UNAVAILABLE:INTERNAL=ON
//STRINGS property for variable: KernelOptimisation
KernelOptimisation-STRINGS:INTERNAL=-O2;-Os;-O1;-O3
KernelOptimisation_all_strings:INTERNAL=-O2;-Os;-O1;-O3
KernelPTLevels_UNAVAILABLE:INTERNAL=ON
KernelPlatExynos5:INTERNAL=OFF
KernelPlatExynos54xx:INTERNAL=OFF
KernelPlatImx6:INTERNAL=ON
KernelPlatImx7:INTERNAL=OFF
KernelPlatPC99:INTERNAL=OFF
KernelPlatform:INTERNAL=imx6
KernelPlatformAM335X:INTERNAL=OFF
KernelPlatformAPQ8064:INTERNAL=OFF
KernelPlatformAllwinnerA20:INTERNAL=OFF
KernelPlatformExynos4:INTERNAL=OFF
KernelPlatformExynos5250:INTERNAL=OFF
KernelPlatformExynos5410:INTERNAL=OFF
KernelPlatformExynos5422:INTERNAL=OFF
KernelPlatformHikey:INTERNAL=OFF
KernelPlatformImx7Sabre:INTERNAL=OFF
KernelPlatformKZM:INTERNAL=OFF
KernelPlatformOMAP3:INTERNAL=OFF
KernelPlatformRpi3:INTERNAL=OFF
KernelPlatformSabre:INTERNAL=ON
KernelPlatformTK1:INTERNAL=OFF
KernelPlatformUltra96:INTERNAL=OFF
KernelPlatformWandQ:INTERNAL=OFF
KernelPlatformZynq7000:INTERNAL=OFF
KernelPlatformZynqmp:INTERNAL=OFF
//Allow the kernel to print out messages to the serial console
// during bootup and execution.
KernelPrinting:INTERNAL=OFF
KernelPrinting_DISABLED:INTERNAL=TRUE
KernelRiscVPlatform_all_strings:INTERNAL=spike
KernelRiscVSel4Arch_all_strings:INTERNAL=riscv32;riscv64
KernelSel4Arch:INTERNAL=aarch32
KernelSel4ArchAarch32:INTERNAL=ON
KernelSel4ArchAarch64:INTERNAL=OFF
KernelSel4ArmHypAarch32:INTERNAL=OFF
//Prevent against the Meltdown vulnerability by using a reduced
// Static Kernel
//\n    Image and Micro-state window instead of having all kernel
// state in the kernel window.
//\n    This only needs to be enabled if deploying to a vulnerable
// processor
KernelSkimWindow:INTERNAL=OFF
KernelSkimWindow_DISABLED:INTERNAL=TRUE
KernelSpikeInstance_all_strings:INTERNAL=qemu;rocket-chip-zedboard;hi-five-unleashed
//Add support for PCIDs (aka hardware ASIDs). Not all processor
// models support this feature.
KernelSupportPCID:INTERNAL=OFF
KernelSupportPCID_DISABLED:INTERNAL=TRUE
KernelSyscall_all_strings:INTERNAL=syscall;sysenter
//Use logical IDs to broadcast IPI between cores. Not all machines
// support logical     IDs. In xAPIC mode only 8 cores can be addressed
// using logical IDs.
KernelUseLogcalIDs:INTERNAL=OFF
KernelUseLogcalIDs_DISABLED:INTERNAL=TRUE
KernelUserStackTraceLength:INTERNAL=0
KernelUserStackTraceLength_UNAVAILABLE:INTERNAL=ON
//VTX support
KernelVTX:INTERNAL=OFF
KernelVTX_DISABLED:INTERNAL=TRUE
KernelWordSize:INTERNAL=32
//rdmsr/wrmsr kernel interface. Provides a syscall interface for
// reading and writing arbitrary MSRs.
//\n    This is extremely dangerous as no checks are performed and
// exists
//\n    to aid debugging and benchmarking.
KernelX86DangerousMSR:INTERNAL=OFF
KernelX86DangerousMSR_DISABLED:INTERNAL=TRUE
//Performs a IBPB on every context switch to prevent Spectre attacks
// between user
//\n    processes. This is extremely expensive and is recommended
// you only turn this on
//\n    if absolutely necessary.
//\n    Note that in a multicore environment you should also enable
// STIBP to prevent
//\n    other cores retraining the branch predictor even after context
// switch.
KernelX86IBPBOnContextSwitch:INTERNAL=OFF
KernelX86IBPBOnContextSwitch_DISABLED:INTERNAL=TRUE
KernelX86IBRSMode_all_strings:INTERNAL=ibrs_none;ibrs_stibp;ibrs_basic;ibrs_all
KernelX86MicroArch_all_strings:INTERNAL=nehalem;generic;westmere;sandy;ivy;haswell;broadwell;skylake
//Flushes the RSB on context switch to prevent Spectre attacks
// between user processes.
//\n    Whilst not nearly as expensive as an IBPB it is not enabled
// by default as it is
//\n    largely pointless to flush the RSB without also doing an
// IBPB as the RSB is already
//\n    a harder attack vector.
KernelX86RSBOnContextSwitch:INTERNAL=OFF
KernelX86RSBOnContextSwitch_DISABLED:INTERNAL=TRUE
KernelX86Sel4Arch_all_strings:INTERNAL=x86_64;ia32
KernelXSaveFeatureSet:INTERNAL=0
KernelXSaveFeatureSet_UNAVAILABLE:INTERNAL=ON
KernelXSaveSize:INTERNAL=0
KernelXSaveSize_UNAVAILABLE:INTERNAL=ON
KernelXSave_all_strings:INTERNAL=XSAVEOPT;XSAVE;XSAVEC
PYTHON:INTERNAL=python
//ADVANCED property for variable: SKIP_MODIFIES
SKIP_MODIFIES-ADVANCED:INTERNAL=1
//ADVANCED property for variable: SORRY_BITFIELD_PROOFS
SORRY_BITFIELD_PROOFS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: SYSCALL_ID_GEN_PATH
SYSCALL_ID_GEN_PATH-ADVANCED:INTERNAL=1
//ADVANCED property for variable: UMM_TYPES
UMM_TYPES-ADVANCED:INTERNAL=1
//ADVANCED property for variable: XMLLINT_PATH
XMLLINT_PATH-ADVANCED:INTERNAL=1